Zain Zhenyuan Ruan


zainruan [at] csail [dot] mit [dot] edu

Office 32-G978B,
32 Vassar Street,
Cambridge, MA 02139

View My GitHub Profile

I am a third-year CS PhD candidate in the PDOS lab at MIT EECS, advised by Prof. Adam Belay. I am interested in operating system, distributed system, and hardware/software co-design.

Before attending MIT, I worked on FPGA/programmable IO device with Prof. Jason Cong at UCLA and Dr. Lintao Zhang at MSR-Asia.


★ indicates an awarded paper.

Disaggregated Memory

  1. AIFM: High-Performance, Application-Integrated Far Memory
    Zhenyuan Ruan, Malte Schwarzkopf, Marcos Aguilera, Adam Belay
    The 14th USENIX Symposium on Operating Systems Design and Implementation (OSDI ‘20)

  2. Semeru: A Memory-Disaggregated Managed Runtime
    Chenxi Wang, Haoran Ma, Shi Liu, Yuanqi Li, Zhenyuan Ruan, Khanh Nguyen, Michael Bond, Ravi Netravali, Miryung Kim, and Guoqing Harry Xu
    The 14th USENIX Symposium on Operating Systems Design and Implementation (OSDI ‘20)

Cloud Efficiency

  1. Caladan: Mitigating Interference at Microsecond Timescales
    Joshua Fried, Zhenyuan Ruan, Amy Ousterhout, Adam Belay
    The 14th USENIX Symposium on Operating Systems Design and Implementation (OSDI ‘20)

  2. Doppio: I/O-Aware Performance Analysis, Modeling and Optimization for In-Memory Computing Framework
    Peipei Zhou, Zhenyuan Ruan, Zhenman Fang, Jason Cong, Megan Shand, David Roazen
    IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS’18)
    Best Paper Nominee

Programmable IO Device (SmartNIC and Smart Drive)

  1. Analyzing and Modeling In-Storage Computing Applications On EISC — An FPGA-Based System-Level Emulation Platform
    Zhenyuan Ruan, Tong He and Jason Cong.
    2019 International Conference On Computer Aided Design (ICCAD’19)
    Best Paper Award

  2. INSIDER: Designing In-Storage Computing System for Emerging High-Performance Drive
    Zhenyuan Ruan, Tong He and Jason Cong
    2019 USENIX Annual Technical Conference (USENIX ATC’19)

  3. KV-Direct: High-Performance In-Memory Key-Value Store with Programmable NIC
    Bojie Li*, Zhenyuan Ruan*, Wencong Xiao, Yuanwei Lu, Yongqiang Xiong, Andrew Putnam, Enhong Chen, Lintao Zhang (*:co-first authors)
    In Proceedings of the 26th Symposium on Operating Systems Principles (SOSP’17)

  4. Memory Efficient Loss Recovery for Hardware-based Transport in Datacenter
    Yuanwei Lu, Guo Chen, Zhenyuan Ruan, Wencong Xiao, Bojie Li, Jiansong Zhang, Yongqiang Xiong, Peng Cheng, Enhong Chen
    In Proceedings of the First Asia-Pacific Workshop on Networking (APNet’17)

FPGA System

  1. Hardware Acceleration of Long Read Pairwise Overlapping in Genome Sequencing: A Race Between FPGA and GPU
    Licheng Guo, Ka Cheong Jason Lau, Zhenyuan Ruan, Peng Wei and Jason Cong
    2019 IEEE International Symposium on Field-Programmable Custom Computing Machines (FCCM’19)

  2. ST-Accel: A High-Level Programming Platform for Streaming Applications on FPGA
    Zhenyuan Ruan, Tong He, Bojie Li, Peipei Zhou and Jason Cong
    2018 IEEE International Symposium on Field-Programmable Custom Computing Machines (FCCM’18)


  1. Software Engineering Intern. Google Mountain View, Ads Data Infrastructure Team.
    Worked on a geo-distributed low-latency streaming system.
    Jun. 2018 - Sept. 2018.

  2. Research Intern. Microsoft Research Asia, System Group.
    Built a high-performance in-memory key-value system with programmable NIC.
    Oct. 2016 - May. 2017.


External Reviewer IPDPS 2019
External Reviewer DATE 2019
External Reviewer FPT 2018
External Reviewer FCCM 2018

Reviewer IEEE TC


Teaching Assistant of MIT 6.828 Operating Systems Research Seminar.